1. Field of the Invention
This invention relates generally to field effect transistor structures and, more particularly, to high performance MOSFET structures and a method for making the same.
2. Discussion of the Related Art
A field-effect transistor (FET) is a solid state amplifying device. Amplification in the device occurs when the current through two terminals is varied by an electric field arising from voltage applied to a third terminal. The FET is thus a voltage controlled device. In an insulated-gate (IG) type of FET, the controlling field appears at an insulating layer. Variations in the field cause corresponding variations in the current through the device. Because the input or control voltage is applied across an insulator, the FET is further characterized by a high input impedance.
In the IGFET, the channel current is controlled by a voltage at a gate electrode which is isolated from the channel by an insulator. In one common configuration, an oxide layer is grown or deposited on the semiconductor surface, and a polysilicon gate electrode is deposited onto this oxide layer. The resulting structure is commonly called a metal-oxide-semiconductor (MOS) structure. If the device includes a source and drain, it represents an MOS transistor or MOSFET. The MOSFET has the advantage of extremely high input impedance between the gate and source electrodes, since these terminals are separated by an oxide layer. The general term IGFET includes devices in which the insulator may be some material other than an oxide layer.
In further discussion of the above, a MOSFET can be either a depletion device or an enhancement device. The depletion device MOSFET is one in which a channel exists at zero gate voltage. The depletion device is thus referred to as a normally on device. On the other hand, the enhancement device MOSFET is a device which requires a gate voltage to induce a channel and is further referred to as a normally off device. Furthermore, the MOSFET is either an n-channel or a p-channel device, depending upon the carrier type in the channel.
In an channel device, the source and drain regions include n.sup.+ regions diffused into a high-resistivity p substrate. The channel region may be either a thin diffused n layer or an induced inversion region. In an n-type diffused channel device, the effect of the electric field is to raise or lower the conductance of the channel by either depleting or enhancing the electron density in the channel. When a positive voltage is applied to the gate (i.e., at the oxide-semiconductor interface), an electric field in the oxide layer exists between positive charge on the gate electrode and negative charge in the semiconductor. The negative charge is composed of an accumulation of mobile electrons into the channel and fixed ionized acceptor atoms in the depleted p material. If the gate-tosource voltage is positive, the conductivity of the channel is enhanced, while a negative gate voltage tends to deplete the channel of electrons. Thus a diffused-channel MOSFET can be operated in either the depletion or enhancement modes.
In an induced-channel MOSFET transistor, for an n-channel device, there is no diffused n-type region existing between source and drain at equilibrium. When a positive gate voltage is applied to the structure, a depletion region is formed in the p material, and a thin layer of mobile electrons is drawn from the source and drain into the channel. Where the mobile electrons dominate, the material is effectively n-type. This is called an inversion layer, since the material was originally p-type. Once the inversion layer is formed near the semiconductor surface, a conducting channel exists from the source to the drain. The operation of the device is then quite similar as discussed above. The channel conductance is controlled by the field in the insulator, but the magnitude of this field varies along the channel (V.sub.Gx) from the voltage at the drain (V.sub.GS -V.sub.DS) to the voltage at the source (V.sub.GS). Since a positive voltage is required between the gate and each point x in the channel to maintain inversion, a large enough value of V.sub.DS can cause the field in the insulator to go to zero at the drain. As a result there is a small depleted region at the drain end of the channel through which electrons are injected in the saturation current. Once pinch-off is reached, the saturation current remains essentially constant. A p-channel MOSFET is similar to the n-channel, however, the conductivity types are reversed.
Referring briefly to one aspect in the fabrication of FET device structures, low series resistance is often achieved by siliciding (i.e., forming a metal silicide at a metal-silicon interface) of the source and drain or selectively depositing metal such as titanium or cobalt on the source and drain areas. However, silicidation consumes surface silicon and can give rise to increased leakage current.
In addition, in the present state of the art, miniaturization of field-effect transistor device dimensions is continually being sought. Several limitations on miniaturization of FET devices have been encountered. For instance, it is extremely difficult to form FETs with the channel other than parallel to the substrate. Thus, the size of the transistor cannot generally be made smaller than the size of the gate or the channel. Furthermore, as the channel is made small, adverse effects on transistor performance occur. Modifications of existing techniques for fabrication of FET device structures introduce performance degradations into fabricated devices and limit performance characteristics of the same.
Microprocessor circuits utilize FET device structures, including, for example, inverter circuits. In an effort increase performance and to increase the speed of a microprocessor circuit, the drive current of the transistor device structures incorporated therein must be increased. Typically, if the circuit is tuned for the transistor, then the faster one makes the transistor, the faster the speed of the circuit. The speed of the transistor is directly correlated with the drive current of the FET, referred to as I.sub.DSAT. I.sub.DSAT is the amount of current which can be flowed through the transistor when the transistor is fully turned on. As the drive current increases, the speed of the transistor increases. Simply increasing the speed of the transistor, however, may not be sufficient. That is, while the speed of the transistor depends upon the raw drive current, if the transistor lacks reliability, then the overall circuit reliability suffers.
In further discussion of an FET device, FIG. 1 shows a conventional transistor having a gate G, source S, and drain D. The transistor further includes parasitic resistances of the lightly doped drain (LDD) regions in the source and drain, corresponding to R.sub.S and R.sub.D, respectively. A bias voltage Vdd is applied to the drain and the source is connected to ground potential. A voltage drop exists across the parasitic resistance R.sub.D, such that the drain sees some voltage less than Vdd (i.e., the voltage which appears at the drain is less than Vdd). Similarly, the voltage drop across parasitic resistance R.sub.S causes the source to see some voltage more than zero (i.e., the voltage which appears at the source is more than ground potential).
As far as the transistor is concerned, when the transistor is on, its drive current(I.sub.DSAT) depends primarily upon V.sub.GS. The relationship between I.sub.DSAT and V.sub.GS is given by the expression I.sub.DSAT =K/2.times.(V.sub.GS -V.sub.r).sup.2, where K is a constant which contains a number of process parameters integrated together, and V.sub.T is the threshold voltage. V.sub.DS is not an included term in the simplified equation since V.sub.DS is more of a secondary effect. In addition, parasitic resistance R.sub.D is also a secondary effect. Reducing or eliminating R.sub.S. therefore pulls the source voltage closer to ground, and increases the effective V.sub.GS. From the equation above, it can be seen that increasing V.sub.GS directly increases I.sub.DSAT.
Furthermore, while it would appear desirable from a drive current point of view to decrease R.sub.D as well, a hot carrier injection control must be maintained. The lightly doped region on the drain side of the transistor is thus necessary. HCI control is a reliability parameter of the transistor. It would thus be desirable to increase the transistor performance, but not at the expense of device reliability.